Senior Staff Digital Designer (ASIC)

A beautiful, steadfast location, and the accidental to articulation a world-leader processing cutting-edge, ultra-low powerfulness integrated circuits. Join our lawsuit arsenic a Digital IC Design Engineer.

Located successful the French-speaking portion of Switzerland, our client’s expertise wrong debased powerfulness integrated circuit improvement spans 40 years.

They are present seeking a Digital IC Design Engineer to articulation their wireless team, and connection a large accidental to undertake a challenging relation operating successful each areas of the ASIC plan travel process. 

In this relation you will:

• Have a cardinal relation successful the improvement of sensor ICs, taking work for plan architecture, RTL plan and verification process, utilizing UVM methodology
• Support the Digital IC Design Lead successful the merchandise explanation and plan execution
• Interface with distant plan teams and interface with the quality, plan services, fab, and back-end plan groups, analog and bundle teams
• Receive enactment and training, and person the accidental to innovate and enactment your ideas into practice

You volition need:

• A grade (BSc / MSc) successful Electronic Engineering oregon similar
• A proven inheritance moving arsenic a Digital IC Design Engineer, with coagulated hands-on skills successful RTL plan - Verilog / SystemVerilog (circa 5-10+ years' experience), and digital-analog integration
• A bully grip connected ASIC Verification activities
• Physical implementation knowledge
• Excellent connection skills successful English (French would beryllium a large plus, but not required)
• To beryllium eligible to enactment successful Switzerland, either with an EU passport oregon Swiss visa
• Previous of acquisition of ultra-low powerfulness RF-SOC oregon mixed awesome products, analog modelling, scripting oregon the automotive manufacture volition each beryllium beneficial

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